Computer Organization and Architecture Multiple Choice Questions(MCQs) & Answers

Computer Organization and Architecture Multiple Choice Questions(MCQs)& Answers Computer Organization and Architecture

Computer Organization and Architecture Multiple Choice Questions(MCQs)& Answers

CONCEPTS & THEORIES

computer-organization-and-architecture

About Computer Organization and Architecture


*It is the study of internal working, structuring and implementation of a computer system.
*The Architecture of a computer system can be considered as a catalogue of tools or attributes that are visible to the user such as instruction sets, number of bits used for data, addressing techniques, etc.
While, Organization of a computer system defines the way system is structured so that all those catalogued tools can be used. The significant components of Computer organization are ALU, CPU, memory and memory organization.

IAS Computer

IAS computer is the upgraded version of the ENIAC machine. IAS was designed by von Neuman and was designed with the concept of stored-program, which allowed the machine operator to store the program along with its input and output into some memory location, but in ENIAC the program had to be manually entered.

Memory Organisation


*RAM (random access memory)
*ROM ( read only memory)
*computer

Input/Output Unit


Input
keyboard
scanner
mouse
Output
printer
speaker

Control Unit

Instruction set is defined as a group of instructions that a processor can execute to perform different operations. It can be classified on the basis of complexity and number of instruction used.

QUESTIONS

Computer Organization and Architecture Multiple Choice Questions(MCQs)& Answers

1 In signed-magnitude binary division, if the dividend is (11100)2 and divisor is (10011)2 then the result is ______.
A (00100)2
B (10100)2
C (11001)2
D 01100)2

Answer: (10100)2
2 Virtual memory consists of _______.
A Static RAM
B Dynamic RAM
C Magnetic memory
D None of these

Answer: Static RAM
3 In a program using subroutine call instruction, it is necessary______.
A initialize program counter
B Clear the accumulator
C Reset the microprocessor
D Clear the instruction register

Answer: Firms and households.
4 A Stack-organised Computer uses instruction of _____.
A Indirect addressing
B Two-addressing
C Zero addressing
D Index addressing

Answer: Zero addressing
5 If the main memory is of 8K bytes and the cache memory is of 2K words. It uses associative mapping. Then each word of cache memory shall be_____.
A 11 bits
B 21 bits
C 16 bits
D 20 bits

Answer: 16 bits
6 Logic X-OR operation of (4ACO)H& (B53F)H results _____.
A AACB
B 0000
C FFFF
D ABCD

Answer: FFFF
7 When CPU is executing a Program that is part of the Operating System, it is said to be in _____.
A Interrupt mode
B System mode
C Half mode
D Simplex mode

Answer: System mode
8 An n-bit microprocessor has_____.
A n-bit program counter
B n-bit address register
C n-bit ALU
D n-bit instruction register

Answer: n-bit instruction register
9 Cache memory works on the principle of_____.
A Locality of data
B Locality of memory
C Locality of reference
D Locality of reference & memory

Answer: Locality of reference
10 In computers, subtraction is carried out generally by____.
A 1’s complement method
B 2’s complement method
C signed magnitude method
D BCD subtraction method

Answer: 2’s complement method
11 PSW is saved in stack when there is a _____.
A interrupt recognized
B execution of RST instruction
C Execution of CALL instruction
D All the above

Answer: interrupt recognized
12 The multiplicand register & multiplier register of a hardware circuit implementing booth’s algorithm have (11101) & (1100). The result shall be ______.
A (812)10
B (-12)10
C (12)10
D (-812)10

Answer: (812)10
13 The circuit converting binary data in to decimal is_____.
A Encoder
B Multiplexer
C Decoder
D Code converter

Answer: Code converter
14 A pipeline is like ………………..
A an automobile assembly line
B house pipeline
C both a and b
D a gas line

Answer: an automobile assembly line
15 A microprogram written as string of 0’s and 1’s is a ………….
A Symbolic microinstruction
B binary microinstruction
C symbolic microinstruction
D binary microprogram

Answer: binary microprogram
16 Memory address refers to the successive memory words and the machine is called as …………
A word addressable
B byte addressable
C bit addressable
D Tera byte addressable

Answer: word addressable
17 The access time of memory is …………… the time required for performing any single CPU operation.
A Longer than
B Shorter than
C Negligible than
D Same as

Answer: Longer than
18 CPU does not perform the operation ………………
A data transfer
B logic operation
C arithmetic operation
D all of the above

Answer: data transfer
19 In a memory-mapped I/O system, which of the following will not be there?
A LDA
B IN
C ADD
D OUT

Answer: LDA
20 Von Neumann architecture is
A SISD
B SIMD
C MIMD
D MISD

Answer: SISD
21 The circuit used to store one bit of data is known as
A Encoder
B OR gate
C Flip Flop
D Decoder

Answer: Flip Flop
22 Write Through technique is used in which memory for updating the data
A Virtual memory
B Main memory
C Auxiliary memory
D Cache memory

Answer: Cache memory
23 Cache memory acts between
A CPU and RAM
B RAM and ROM
C CPU and Hard Disk
D None of these

Answer: CPU and RAM
24 Generally Dynamic RAM is used as main memory in a computer system as it
A Consumes less power
B has higher speed
C has lower cell density
D needs refreshing circuitary

Answer: has higher speed
25 In signed-magnitude binary division, if the dividend is (11100) 2 and divisor is (10011) 2 then the result is
A (00100) 2
B (10100) 2
C (11001) 2
D (01100) 2

Answer: (10100) 2
26 Virtual memory consists of
A Static RAM
B Dynamic RAM
C Magnetic memory
D None of these

Answer: Static RAM
27 Program always deals with
A logical address
B relative address
C physical address
D absolute address

Answer: logical address
28 Memory management technique in which system stores and retrieves data from secondary storage for use in main memory is called
A fragmentation
B paging
C mapping
D none of the mentioned

Answer: paging
29 A group of bits that tell the computer to perform a specific operation is known as
A Instruction code
B Micro-operation
C Accumulator
D Register

Answer: Instruction code
30 The load instruction is mostly used to designate a transfer from memory to a processor register known as
A Accumulator
B Instruction Register
C Program counter
D Memory address Register

Answer: Accumulator
31 The communication between the components in a microcomputer takes place via the address and
A I/O bus
B Data bus
C Address bus
D Control lines

Answer: Data bus
32 An instruction pipeline can be implemented by means of
A LIFO buffer
B FIFO buffer
C Stack
D None of the above

Answer: FIFO buffer
33 Data input command is just the opposite of a
A Test command
B Control command
C Data output
D Data channel

Answer: Data output
34 A microprogram sequencer
A generates the address of next micro instruction to be executed.
B generates the control signals to execute a microinstruction.
C sequentially averages all microinstructions in the control memory.
D enables the efficient handling of a micro program subroutine.

Answer: generates the address of next micro instruction to be executed.
35 An n-bit microprocessor has
A n-bit program counter
B n-bit address register
C n-bit ALU
D n-bit instruction register

Answer: n-bit instruction register
36 Cache memory works on the principle of
A Locality of data
B Locality of memory
C Locality of reference
D Locality of reference & memory

Answer: Locality of reference
37 The main memory in a Personal Computer (PC) is made of
A cache memory.
B static RAM
C Dynamic Ram
D both (A) and (B)

Answer: both (A) and (B)
38 In computers, subtraction is carried out generally by
A 1’s complement method
B 2’s complement method
C signed magnitude method
D BCD subtraction method

Answer: 2’s complement method
39 PSW is saved in stack when there is a
A interrupt recognised
B execution of RST instruction
C Execution of CALL instruction
D All of these

Answer: interrupt recognised
40 The circuit converting binary data in to decimal is
A Encoder
B Multiplexer
C Decoder
D Code converter

Answer: Code converter
41 Which of the following registers is used to keep track of address of the memory location where the next instruction is located?
A Memory Address Register
B Memory Data Register
C Instruction Register
D Program Register

Answer: Program Register
42 Data hazards occur when ……
A Greater performance loss
B Pipeline changes the order of read/write access to operands
C Some functional unit is not fully pipelined
D Machine size is limited

Answer: Pipeline changes the order of read/write access to operands
43 Assembly language
A uses alphabetic codes in place of binary numbers used in machine language
B is the easiest language to write programs
C need not be translated into machine language
D None of these

Answer: uses alphabetic codes in place of binary numbers used in machine language
44 In computers, subtraction is generally carried out by
A 9’s complement
B 10’s complement
C 1’s complement
D 2’s complement

Answer: 2’s complement
45 What characteristic of RAM memory makes it not suitable for permanent storage?
A too slow
B unreliable
C it is volatile
D too bulky

Answer: it is volatile
46 The circuit used to store one bit of data is known as
A Register
B Encoder
C Decoder
D Flip Flop

Answer: Flip Flop
47 The average time required to reach a storage location in memory and obtain its contents is called the
A seek time
B turnaround time
C access time
D transfer time

Answer: access time
48 Which of the following is not a weighted code?
A Decimal Number system
B Excess 3-cod
C Binary number System
D None of these

Answer: Excess 3-cod
49 The idea of cache memory is based
A on the property of locality of reference
B on the heuristic 90-10 rule
C on the fact that references generally tend to cluster
D all of the above

Answer: on the property of locality of reference
50 A-Flip Flop can be converted into T-Flip Flop by using additional logic circuit
A n TQD =•
B T D =
C D = T . Q n
D n TQD =?

Answer: n TQD =?
51 Logic X-OR operation of (4ACO) H & (B53F) H results
A AACB
B 0000
C FFFF
D ABCD

Answer: FFFF
52 A three input NOR gate gives logic high output only when
A one input is high
B one input is low
C two input are low
D all input are high

Answer: all input are high
53 The operation executed on data stored in registers is called
A Macro-operation
B Micro-operation
C Bit-operation
D Byte-operation

Answer: Micro-operation
54 MRI indicates
A Memory Reference Information.
B Memory Reference Instruction.
C Memory Registers Instruction.
D Memory Register information

Answer: Memory Reference Instruction.
55 _________ register keeps tracks of the instructions stored in program stored in memory.
A AR (Address Register)
B XR (Index Register)
C PC (Program Counter)
D AC (Accumulator)

Answer: PC (Program Counter)
56 Memory unit accessed by content is called
A Read only memory
B Programmable Memory
C Virtual Memory
D Associative Memory

Answer: Associative Memory
57 RAM stands for
A Random origin money
B Random only memory
C Random access memory
D None of these

Answer: Random access memory
58 When more than one processes are running concurrently on a system-
A batched system
B real-time system
C multi programming system
D multiprocessing system

Answer: multi programming system
59 Cache memory-
A has greater capacity than RAM
B is f aster to access than CPU Registers
C is permanent storage
D f aster to access than RAM

Answer: f aster to access than RAM
60 Which memory unit has lowest access time?
A Cache
B Registers
C Magnetic Disk
D Main Memory

Answer: Registers

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