Operating System MCQ and Answers – Structures

These Operating System MCQ and Answers – Structures are asked in various examinations including BCA, MCA, GATE, and other tests. The questions based on the below Operating System MCQ and Answers – Structures test your basic knowledge of MCQs on the topic of Operating Systems and the level of comprehension and grasp that you hold.

Operating System MCQ and Answers – Structures

1. What is an ISR?

a) Information Service Request

b) Interrupt Service Request

c) Interrupt Service Routine

d) Information Service Routine

Answer: c

2. What is an interrupt vector?

a) It is an address that is indexed to an interrupt handler

b) It is a unique device number that is indexed by an address

c) It is a unique identity given to an interrupt

d) None of the mentioned

Answer: a

3. DMA is used for __________

a) High speed devices(disks and communications network)

b) Low speed devices

c) Utilizing CPU cycles

d) All of the mentioned

Answer: a

4. In a memory mapped input/output __________

a) the CPU uses polling to watch the control bit constantly, looping to see if a device is ready

b) the CPU writes one data byte to the data register and sets a bit in control register to show that a byte is available

c) the CPU receives an interrupt when the device is ready for the next byte

d) the CPU runs a user written code and does accordingly

Answer: b

5. In a programmed input/output(PIO) __________

a) the CPU uses polling to watch the control bit constantly, looping to see if a device is ready

b) the CPU writes one data byte to the data register and sets a bit in control register to show that a byte is available

c) the CPU receives an interrupt when the device is ready for the next byte

d) the CPU runs a user written code and does accordingly

Answer: a

6. In an interrupt driven input/output __________

a) the CPU uses polling to watch the control bit constantly, looping to see if a device is ready

b) the CPU writes one data byte to the data register and sets a bit in control register to show that a byte is available

c) the CPU receives an interrupt when the device is ready for the next byte

d) the CPU runs a user written code and does accordingly

Answer: c

7. In the layered approach of Operating Systems __________

a) Bottom Layer(0) is the User interface

b) Highest Layer(N) is the User interface

c) Bottom Layer(N) is the hardware

d) Highest Layer(N) is the hardware

Answer: b

8. How does the Hardware trigger an interrupt?

a) Sending signals to CPU through a system bus

b) Executing a special program called interrupt program

c) Executing a special program called system program

d) Executing a special operation called system call

Answer: a

9. Which operation is performed by an interrupt handler?

a) Saving the current state of the system

b) Loading the interrupt handling code and executing it

c) Once done handling, bringing back the system to the original state it was before the interrupt occurred

d) All of the mentioned

Answer: d

10. The initial program that is run when the computer is powered up is called __________

a) boot program

b) bootloader

c) initializer

d) bootstrap program

Answer: d

11. How does the software trigger an interrupt?

a) Sending signals to CPU through bus

b) Executing a special operation called system call

c) Executing a special program called system program

d) Executing a special program called interrupt trigger program

Answer: b

12. What is a trap/exception?

a) hardware generated interrupt caused by an error

b) software generated interrupt caused by an error

c) user generated interrupt caused by an error

d) none of the mentioned

Answer: b

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